Some Experiments on Tiling Loop Programs for Shared-Memory Multicore Architectures

نویسنده

  • Armin Größlinger
چکیده

The model-based transformation of loop programs is a way of detecting fine-grained parallelism in sequential programs. One of the challenges is to agglomerate the parallelism to a coarser grain, in order to map the operations of the program to the available cores in a multicore architecture. We consider shared-memory multicores as target architecture for space-time mapped loop programs and make some observations concerning code generation, load balancing and cache effects.

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Parallelization of Graph Isomorphism using OpenMP

Advancement in computer architecture leads to parallelize the sequential algorithm to exploit the concurrency provided by multiple core on single chip. Sequential programs do not gain performance from multicore. For multicore architectures, OPENMP and MPI are application programming interfaces. They can be used for parallelization of codes. For shared memory architecture OPENMP is used, whereas...

متن کامل

Improving Scalability of OpenMP Applications on MultiCore Systems

Modern multicore architectures have become popular because of the limitations of deep pipelines and heating and power concerns. Some of these multicore architectures such as the Intel Xeon have the ability to run several threads on a single core. The OpenMP standard for compiler directive based shared memory programming allows the developer an easy path to writing multithreaded programs and is ...

متن کامل

Design of a novel congestion-aware communication mechanism for wireless NoC architecture in multicore systems

Hybrid Wireless Network-on-Chip (WNoC) architecture is emerged as a scalable communication structure to mitigate the deficits of traditional NOC architecture for the future Multi-core systems. The hybrid WNoC architecture provides energy efficient, high data rate and flexible communications for NoC architectures. In these architectures, each wireless router is shared by a set of processing core...

متن کامل

Program Execution on Reconfigurable Multicore Architectures

Based on the two observations that diverse applications perform better on different multicore architectures, and that different phases of an application may have vastly different resource requirements, Pal et al. proposed a novel reconfigurable hardware approach for executing multithreaded programs. Instead of mapping a concurrent program to a fixed architecture, the architecture adaptively rec...

متن کامل

Analysis of Parallelization Techniques and Tools

Parallel Computing solves computationally large problems by partitioning into multiple tasks and running simultaneously on multicore or multiprocessor environment based on shared or distributed memory architectures. New multicore era demands software programmer to develop parallel programs to completely utilize the hardware parallelism. Writing parallel program manually for complex problem is a...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2007